The real prize isn’t speed. It’s the 70% energy gain that AI data centers are desperate for, delivered through a business model that lets IBM profit without building a single fab.
IBM says it has found a way to keep shrinking chips for another decade, unveiling a 0.7-nanometer process that is the first to break the one-nanometer threshold. It promises 50% more performance and 70% better energy efficiency. IBM will not build it. It will license it, which is the whole point.
For years the smart money has been betting on the end of an era. Jensen Huang has called Moore’s Law dead. Industry veterans have warned that the physics of cramming more switches onto silicon had finally run out of room. On Thursday, IBM walked into that funeral and told everyone to put the shovels down.
What Happened
IBM released details of a new chip manufacturing process it says can roughly double the number of transistors on a fingernail-size chip compared with the technology it introduced in 2021. The company quantifies the leap as 50% greater computing performance and 70% better energy efficiency.
IBM is labeling the process 0.7 nanometers, making it the first to cross below one nanometer. The underlying breakthrough is what IBM calls a “nanostack” transistor, an approach it first described a year ago. Huiming Bu, the IBM vice president running chip research and development, said the technology should be ready within five years but declined to name which manufacturers might use it.
The Backstory
IBM pioneered the semiconductor, but it does not make or sell chips anymore. What it still does, out of a laboratory in Albany, New York, is invent the methods for turning silicon wafers into chips, then license those methods to the companies that actually run the fabs. Past licensees include Samsung Electronics and Japan’s Rapidus.
The “nanometer” labels thrown around in this race are worth a caveat. They stopped being precise measurements years ago and now function mostly as marketing tags that separate one technology generation from the next. Taiwan Semiconductor Manufacturing Company is producing chips rated near two nanometers, and Intel has comparable technology it calls 1.8 nanometers. IBM’s 0.7-nanometer claim is a generational marker, not a literal ruler reading.
The Plan
The engineering trick is to stop shrinking transistors sideways and start stacking them upward, building three-dimensional structures that rise off the chip surface like tiny skyscrapers. TSMC and Intel recently moved to a 3D design called a nanosheet transistor, which IBM also helped pioneer.
IBM’s new method goes a step further. It takes two wafers built with nanosheet-style transistors and effectively glues one upside down onto the other, vertically linking two types of transistors in a tight space. The result, according to analysts briefed on it, is a faster transistor that draws less power. The catch is the timeline: a five-year runway and, so far, no publicly named customer.
The Business Model Angle
Here is the part operators should study. IBM sits at the most capital-brutal point in the entire technology economy, where a single leading-edge fab now costs tens of billions of dollars, and it chose not to play that game. Instead it kept the one layer with the best margins and the least capital risk: the research and the intellectual property. It sells the blueprint, not the chip.
That is a clean example of a principle worth internalizing. Pick the layer of your industry where you actually win, own it completely, and refuse to bleed capital defending a layer you are structurally worse at. IBM is, in effect, an arms dealer to the arms dealers. TSMC, Intel, and Samsung absorb the fab cost, the yield risk, and the geopolitical exposure. IBM collects licensing revenue and reinvests it into the next process node. For the full picture of how the company monetizes research over manufacturing, see our IBM business model breakdown.
The other half of the story is which number IBM led with. Not the 50% performance gain. The 70% energy efficiency gain. That ordering is deliberate, because power is now the binding constraint on the AI buildout. As Bu put it, “Everyone demands more performance, but no one wants to pay for the power.” Energy-hungry AI chips are already delaying data center construction for builders who cannot lock in affordable electricity, which is exactly why companies like Nvidia are spending billions to attack the same bottleneck from a different direction, as we covered in our look at Nvidia’s photonics bet. Efficiency, not raw speed, is the product feature the market is paying a premium for.
The Risk
The announcement is a roadmap, not a shipment. Three things could undercut it.
First, adoption. IBM’s model only pays off if manufacturers actually license and deploy the process, and Bu would not name a single committed partner. A brilliant process with no fab behind it generates headlines, not revenue.
Second, competition. Imec, an influential Belgian research center, is backing a rival next-generation approach that has drawn interest from multiple chip makers. It builds 3D structures layer by layer, a path one analyst cautioned could introduce defects, but the existence of a credible alternative means IBM does not own this future by default.
Third, timing. Five years is a long horizon in a market moving this fast, and analysts have openly flagged the question of whether IBM’s technology reaches production first or arrives after a competitor has already set the standard. Being first to invent and first to market are very different wins.
Quick Questions
Does this mean Moore’s Law is alive after all?
Partly. The cost-per-transistor benefit that defined the original law has largely vanished, because fabs got too expensive, which is why leaders like Jensen Huang call it dead. But the performance and efficiency gains it predicted are still arriving. The cost curve may be dead; the capability curve is not.
Why does IBM not just build the chips itself?
Because leading-edge manufacturing is the lowest-margin, highest-capital, highest-risk layer of the business. IBM exited it and kept the research-and-licensing layer, where it earns more and risks far less.
What does 0.7 nanometers actually measure?
Not much, literally. The number is a generational label for a technology family, not a physical dimension. It signals “next step beyond two-nanometer-class chips,” not a tape-measure reading.
Who would use this?
IBM has not said. Its past licensees include Samsung and Rapidus, and TSMC and Intel have adopted IBM-pioneered designs before, so any of them are plausible. No commitments have been announced.
The Business Model Analyst Take
Strip away the nanometers and this is a story about positioning. IBM has not made a chip in years, yet it keeps writing the rulebook the entire industry builds against, and it does so from the safest, most profitable seat in a famously dangerous business. That is the lesson worth stealing: in a sector defined by capital intensity, the winner is not always the one who builds the most. Sometimes it is the one who owns the idea and lets everyone else carry the cost.
The market signal underneath is just as sharp. When IBM leads its own announcement with efficiency over speed, it is telling you what its customers will pay for. The AI economy has quietly shifted from a performance race to a power race, and the companies that read that shift early, whether they make chips, build data centers, or simply depend on them, will be the ones who price it correctly.
Based on reporting by Don Clark for The New York Times.
